After forming a gate insulating film on a semiconductor substrate and forming a gate electrode on the gate insulating film, source and drain regions are formed by the ion implantation or the like. Through the process described above, a MISFET (Metal Insulator Semiconductor Field Effect Transistor, MIS field effect transistor, MIS transistor) is formed.
Also, in the CMISFET (Complementary Metal Insulator Semiconductor Field Effect Transistor), in order to realize the low threshold voltage in both of the n channel MISFET and the p channel MISFET, the so-called dual-gate structure in which materials having different work functions (Fermi level, in the case of polysilicon) are used to form the gate electrodes has been employed. More specifically, an n type impurity and a p type impurity are introduced into the respective polysilicon films of the n channel MISFET and the p channel MISFET so that the work function (Fermi level) of the gate electrode material of the n channel MISFET becomes close to the conduction band of silicon and the work function (Fermi level) of the gate electrode material of the p channel MISFET becomes close to the valence band of silicon. By doing so, the threshold voltage is reduced.
However, the thickness of a gate insulating film has been reduced more and more due to the scaling down of the CMISFET device in recent years, and the influence of the depletion in the gate electrode when a polysilicon film is used for the gate electrode has become a significant problem. For the solution of the problem, there is the technology of using a metal gate electrode as the gate electrode for preventing the depletion in the gate electrode.
U.S. Pat. No. 6,599,831 B1 describes the technology in which a polysilicon film doped with a dopant is reacted with a nickel layer formed thereon to form a gate electrode made of nickel silicide.